Figure BJT-4 shows that we can make a logic inverter from an npn transistor in the common-emitter configuration. When the input voltage is LOW, the output voltage is HIGH, and vice versa.
In digital switching applications, bipolar transistors are often operated so they are always either cut off or saturated. That is, digital circuits such as the inverter in Figure BJT-4 are designed so that their transistors are always (well, almost always) in one of the states depicted in Figure BJT-5. When the input voltage VIN is LOW, it is low enough that Ib is zero and the transistor is cut off; the collector-emitter junction looks like an open circuit. When VIN is HIGH, it is high enough (and R1 is low enough and is high enough) that the transistor will be saturated for any reasonable value of R2; the collector-emitter junction looks almost like a short circuit. Input voltages in the undefined region between LOW and HIGH are not normally encountered, except during transitions. This undefined region corresponds to the noise margin that we discussed.
Another way to visualize the operation of a transistor inverter is shown in Figure BJT-6. When VIN is HIGH, the transistor switch is closed, and the output terminal is connected to ground, definitely a LOW voltage. When VIN is LOW, the transistor switch is open and the output terminal is pulled to 5 V through a resistor; the output voltage is HIGH unless the output terminal is too heavily loaded (i.e., improperly connected through a low impedance to ground).
In digital switching applications, bipolar transistors are often operated so they are always either cut off or saturated. That is, digital circuits such as the inverter in Figure BJT-4 are designed so that their transistors are always (well, almost always) in one of the states depicted in Figure BJT-5. When the input voltage VIN is LOW, it is low enough that Ib is zero and the transistor is cut off; the collector-emitter junction looks like an open circuit. When VIN is HIGH, it is high enough (and R1 is low enough and is high enough) that the transistor will be saturated for any reasonable value of R2; the collector-emitter junction looks almost like a short circuit. Input voltages in the undefined region between LOW and HIGH are not normally encountered, except during transitions. This undefined region corresponds to the noise margin that we discussed.
Another way to visualize the operation of a transistor inverter is shown in Figure BJT-6. When VIN is HIGH, the transistor switch is closed, and the output terminal is connected to ground, definitely a LOW voltage. When VIN is LOW, the transistor switch is open and the output terminal is pulled to 5 V through a resistor; the output voltage is HIGH unless the output terminal is too heavily loaded (i.e., improperly connected through a low impedance to ground).
ELABORADO POR:
NERWIN ANTONIO MORA REINOSO
C.I: 17.557.095
EES
SECCION 1
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